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CV

Nilesh Patidar
 

Department of Electronics & Communication,

Shri Vaishnav Institute of Technology and Science,

Gram-Baroli, Sanwer-Ujjain Road, Indore,

Madhya Pradesh, INDIA 451231

 

E-mail: neel.s.patidar@gmail.com.com

Phone: 999-319-6888

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Professional info​

In 2013, he joined the Department of Electronics & Instrumentation Engineering, SVITS, Indore, India as an Assistant Professor. Since July 2015, he has been with the Department of Electronics & Communication Engineering, SVITS, Indore, India. where he was an Assistant Professor. His current research interests include nano-electronics, low power & small area electronics system design, various types of adders & ALU design with QCA technology.Mr. Patidar has number of publications in the field of Nano-electronics (QCA Technology) & VLSI in international journals and conferences. He has attended various workshops conducted by IITs and presents their research paper in national workshop conducted by IIT, Indore in 2012. He has been awarded for the best paper in 2013 for publication in International Journal of Nanotechnology and Applications (IJNA) by the Trans-Stellar journals.

Languages

Assembly Language

C/C++

VHDL

Verilog

EDA Tools

ModelSim

Xillix-ISE

QCADesigner

Eagle PCB Designer

LTSpice Circuit Simulator

Keil-8051IDE

Proteus

Professional Experience
Assistant Professor

​2015 - present

 

Department of Electronics & Communication Engineering

Shri Vaishnav Institute of Technology & Science, Indore (MP), India

 

Assistant Professor

​2013 - 2015

 

Department of Electronics & Instrumentation Engineering

Shri Vaishnav Institute of Technology & Science, Indore (MP), India.

Skills
Skills

Knowledge of MS-Office

PHOTOSHOP

 

Knowledge of MS-Office

PHOTOSHOP

 

Operating System

Windows XP

Windows 7

Windows 8

Linux

 

Education​
Master of Engineering                                                    2010 - 2013
Embedded System & VLSI Design

 

Institute        :     Shri Vaishnav Institute of Technology & Science, Indore, MP, INDIA

University     :     Rajiv Gandhi Prodyogiki Vishwavidyala, Bhopal, MP, INDIA

Thesis Title   :     Design and Implementation of 2-bit, 4-bit & 8-bit Arithmetic Logic Unit using                                        Quantum-Dot Cellular Automata (QCA) Technique.

Supervisor   :      Prof. Namit Gupta

CGPA          :      7.6 (Ist Division with Hons.)

 

 

Bachelor of Engineering                                          2005 - 2009
Electronics & Communication

Institute        :     Jawaharlal Institute of Technology, Borawan (Khargone), MP, INDIA

University     :     Rajiv Gandhi Prodyogiki Vishwavidyala, Bhopal, MP, INDIA

Project Title  :     Load Based Traffic Light Controller using 8051 Microcontroller.

Supervisor   :      Prof. Mukesh Yadav

Percentage  :      71.91%

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